A Preliminary List of Topics

i. INTRODUCTION

1.1 Discrete Manufacturing Processes

1.2 Discrete Process Diagrams

1.3 Discrete Process Control

1.4 Process and Control Sub-Components

ii. PROGRAMMABLE LOGICAL CONTROLLERS (PLCs)

2.1 Overview

2.2 Theory of Operation

2.3 Ladder Circuit Diagrams

2.3.1 Ladder Logic Inputs
2.3.2 Ladder Logic Outputs

2.4 PLC Architecture

2.4.1 PLC Organization
2.4.2 PLC Status
2.4.3 Processor
2.4.4 Memory
2.4.5 Input and Output
2.4.6 Power Supply
2.4.7 Peripherals

2.5 Operation of a PLC

2.5.1 Boolean Algebra
2.5.2 Discrete Logic
2.5.3 Boolean Forms
2.5.4 Boolean Algebra for Ladder Logic Diagrams
2.5.5 Karnaugh Maps for Boolean Logic
2.5.6 Positive and Negative Logic

2.6 Event-Based Logic

2.6.1 Relays
2.6.2 Timers
2.6.3 Counters
2.6.4 Latches
2.6.5 Flip-flops
2.6.6 Oscillators

2.7 PLC Programming

2.7.1 Software-based PLCs
2.7.2 Programming Methods
2.7.2.1 Timing Diagrams
2.7.3 Scripts
2.7.4 Structured Text Programming
2.7.5 Functional Block Programming
2.7.6 Instruction List
2.7.7 Sequence Function Chart
2.7.8 Parallel Process Flowcharts
2.7.9 Programming Standards and Structures

2.7.9.1 IEC 1131
2.7.9.2 Branching and Looping
2.7.9.3 Immediate I/O Instructions
2.7.9.4 Fault Detection and Intervention

2.8 Truth Tables and Logic Gates

2.8.1 Truth Tables
2.8.2 Logic Gates

2.9 Implementation of PLCs

2.10 Selection of PLC

2.10.1 Issues to Consider
2.10.2 Suppliers

2.11 Advanced Topics in PLCs

2.11.1 Addressing
2.11.2 Numbering Systems
2.11.3 Advanced Data Handling
2.11.3.1 Multiple Data Value Functions

2.12 Conclusions

2.13 References

iii. STATE TABLES

3.1 Introduction

3.2 State Diagrams and State Tables

3.3 Generation of a State Table

3.3.1 Automatic Generation using Software

3.4 Reduction of State Tables and State Assignment

3.4.1 Elimination of Redundant States
3.4.2 Equivalent States
3.4.3 Determination of State Equivalency
3.4.4 Incompletely Specified State Tables
3.4.5 Equivalent State Assignments
3.4.6 Guidelines for State Assignments

3.5 Applications of State Tables

3.6 Conclusions

3.7 References

iv. FINITE STATE AUTOMATA

4.1 Introduction to Computational Models

4.1.1 Finite Automata
4.1.2 Pushdown Automata
4.1.3 Context-Free Grammars

4.2 Mathematical Notation and Structure of Automata

4.3 Finite State Automata (FSA)

4.3.1 FSA and Boolean Algebra
4.3.2 FSA Theorems
4.3.3 Finite State Machines

4.4 FSA and Manufacturing Control Architectures

4.5 Conclusions

4.6 References

v. DEADLOCKS IN MANUFACTURING SYSTEMS

5.1 Introduction

5.2 Types of Deadlocks

5.2.1 Part Flow Deadlocks
5.2.2 Impending Part Flow Deadlocks
5.2.3 Processing Resource Deadlocks
5.2.4 Deadlocks Associated With Vehicle Systems

5.3 Deadlock Modeling

5.3.1 Graph-Theoretic Representations
5.3.2 Interaction Between Circuits
5.3.3 Necessary and Sufficient Conditions

5.4 Deadlock Detection and Avoidance Methods

5.4.1 Algorithms
5.4.2 Multi-pass Simulation
5.4.3 Implementation Issues

5.5 Recovery from Deadlock

5.6 Conclusions

5.7 References